1. Field
This document relates to a thin film transistor substrate having metal oxide and a manufacturing method thereof which is capable of reducing power consumption by reducing a channel length and being applied to high-resolution models by reducing a size of an area of the thin film transistor.
2. Related Art
Recently, according to the development of multimedia, the importance of a flat panel display (FPD) is increased. Accordingly, several displays have been commercialized, such as a liquid crystal display (LCD), a plasma display panel (PDP), a field emission display (FED), an organic field light emitting device and the like.
Of these, the liquid crystal display device has an excellent visibility, small average power consumption and small heat dissipation, compared to a cathode ray tube. In addition, the field light emitting device is in the spotlight as a next-generation display device, since a response rate is high to be less than 1 ms, power consumption is low, and a viewing angle is very large by self-lighting.
Methods of driving the display device include a passive matrix method, and an active matrix using a thin film transistor. The passive matrix method is a way in that the display device is driven by forming at right angles an anode and a cathode and selecting lines, whereas the active matrix method is a way in that thin film transistors are connected to each of pixel electrodes and the display device is driven according to a voltage retained by capacity of a capacitor that is connected to a gate electrode of a thin film transistor.
It is very important to have durability and electrical reliability that can maintain a long life, as well as basic characteristics, such as mobility, leakage current and the like, of the thin film transistor. Here, an active layer of the thin film transistor is mainly formed by amorphous silicon or polycrystalline silicon. If the amorphous silicon is used, a film formation process is simpler and a manufacturing cost is low, but there is a problem in that the electrical reliability may not be ensured. In addition, if the polycrystalline silicon is used, there are problems in that it is very difficult to large-area applications due to a high temperature in the process, and uniformity is not secured according to a crystallization method.
On the other hand, if the active layer is formed as the metal oxide, high mobility can be obtained although the active layer is formed at a low temperature, and the desired properties can be easily obtained due to large change in resistance, depending on the oxygen content. Accordingly, applications to the thin film transistor have attracted great interest recently. In particular, a metal oxide semiconductor may be, for example, zinc oxide (ZnO), indium zinc oxide (InZnO), zinc tin oxide (ZnSnO), indium gallium zinc oxide (InGaZnO4) or the like.
FIG. 1 is a cross-sectional view illustrating a thin film transistor substrate including metal oxide in the prior art. Referring to FIG. 1, a gate electrode 15 and a gate insulating film 20 are disposed on a substrate 10, and an active layer 25 consisting of metal oxide is disposed on the gate insulating film 20. An etch stopper 30 to protect the active layer 25 is disposed on the active layer 25, and a source electrode 35a and a drain electrode 35b are disposed to be contacted with the active layer 25 on the etch stopper 30 to form the thin film transistor. In addition, a passivation film 40 to protect the thin film transistor and a pixel electrode 45 contacted with the drain electrode 35b are disposed.
The thin film transistor is formed with the etch stopper 30 to prevent direct damage for the active layer 25 in a manufacturing process of the source electrode 35a and the drain electrode 35b. In this case, there is a problem in that a channel length of the active layer 25 is very long due to the etch stopper 30. Accordingly, the channel length of the active layer consisting of amorphous silicon in the prior art is longer at about 5 μm, whereas the channel length of the active layer consisting of metal oxide in the prior art is longer at about 10 μm. As a result, since power consumption of a display device is increased and an area of the thin film transistor is increased, there is a problem in that resolution is reduced.